13 Mar 2024
Job Information
- Organisation/Company
- Cadence EMEA
- Research Field
- Computer science » Other
- Researcher Profile
- Established Researcher (R3)
- Country
- Germany
- Application Deadline
- Type of Contract
- To be defined
- Job Status
- Negotiable
- Is the job funded through the EU Research Framework Programme?
- Not funded by an EU programme
- Is the Job related to staff position within a Research Infrastructure?
- No
Offer Description
Job Overview:
Lead Analog and Mixed Signal design of high speed memory interface analog components used in state-of-the-art DDR memory interface PHYs in leading edge technology nodes. Consisting of blocks such as IOs, amplifiers, comparators, drivers, duty cycle correctors, PLLs, DLLs, level shifters, etc. in advanced IC nodes in volume production.
As Principal Design Engineer, you will provide technical direction and coordination to the analog IC design team and Identify opportunities to advance technology of analog design and participate in strategic internal analog IP development.
Requirements
Additional Information
- Website for additional job details
Work Location(s)
- Number of offers available
- 1
- Company/Institute
- Cadence EMEA
- Country
- Ireland
- City
- Cork
- Geofield
Where to apply
- Website
Contact
- City
- Several locations in Germany, France, Italy, Israel, Sweden, UK
- Website
- woodsb@cadence.com