Call for Position: DTIC-PLCT-2023-48 - Research Support position - Junior ASIC designer

Requirements: 

• BSc. in Electrical, Electronics or Telecommunications Engineering, or Physics. 
• Very solid background in electronics and microelectronics.
• More than 1 year of experience in ASIC design. 
• Experience or willingness to work with Cadence® design tools for analog design,  VHDL programming and physical implementation for microelectronics. 
• Experience in PCB design and programming of microcontrollers and FPGAs.

The expected start date is December 1st, 2023, the job is in Barcelona.

Apart from the requirements shown above, you are perfect for us if you: 

1. Are looking for a challenging project where you can experience the complete IC design, fabrication and validation process. 
2. Are passionate about your job. 
3. Are willing to learn from and interact with the rest of our team members and advisors. We look for excellent team players. 
4. Are honest, respectful, responsible, and reliable. 
5. Have a can-do attitude and have initiative. 
6. Want to participate in dissemination activities to share the knowledge obtained during the project and the possibilities of the implantable technology.

You will join a team of researchers that have obtained several European and national grants, with the potential to grow in the next coming years, and to spin-off the microsensing platform. You will benefit from: 

• A fulfilling ASIC design position in an ideal environment to learn and gain experience. 
• A competitive salary in the sector (30-37 k€ based on your experience and skills).
• Flexible working hours. 
• Great office and laboratories in Barcelona, with state-of-the-art equipment. Located at the UPF’s Poblenou Campus at the 22@, the technological and innovation district of the city.
• Entrepreneurial environment, with the possibility to participate in patent ideation. 
• Dynamic and exciting department of Engineering, with several scientific backgrounds and extracurricular activities. 

Selection criteria: 

The selection process will consist of a merit-based procedure in alignment with the Open, Transparent and Merit-based Recruitment system of the European Commission. After the eligibility criteria is checked, the candidates will be invited to an online and/or face-to-face interview. The results will be evaluated by a tribunal, who will finally define the selected candidate to be officially invited to join BERG’s team. The project starts on December 1st, 2023.

Valuation will be as follows:

• Academic Background (0-30 points). Academic qualifications within or above the required level. MSc. in Microelectronics will be very positively considered. 
• Relevant research and/or professional experience (0-50 points). Adequacy to the proposed profile and experience. Experience in tape-out process, and submission process of EUROPRACTICE prototyping services will be very positively considered.
• Other merits (0-20 points). Languages (English, Spanish; Catalan is positively considered). Professional knowledge and skills. Experience working in teams. Communication skills. Motivation for the workplace.

The minimum score to pass the selection process is 85 points. The candidate with the highest score in the selection process will be offered the job and in case of resignation, the position will be awarded to the next person in order of score obtained, as long as the established minimum score has been passed.

For more information about the call, how to apply, the list of those admitted and excluded, as well as the hiring proposal, check the website: https://www.upf.edu/web/etic/management