Nokia Bell Labs is one of the world’s leading research institutions, chartered with producing disruptive innovations for next phase of human existence. With expertise in analytics, cloud, fixed, optics and wireless and by collaborating openly with the global innovation community, we are seeking the technology solutions that will transform the connected world. We enhance the speed, capacity, efficiency and reliability of data enabling the automation and digitization of our lives. For 90 years, scientific breakthrough at Nokia Bell Labs have fundamentally transformed the ICT industry and won 9 Nobel Prizes.
The Hardware Platforms research team in Antwerp groups ASIC and FPGA experts around the globe and acts as centralized hardware research group for the entire Bell Labs organization. An important focus for the team in Antwerp is the research on signal processing in fixed and mobile access context and we target to create revolutionary ASIC/FPGA solutions for future networks. We are currently seeking to hire an Early Stage Researcher (ESR) to join the SMArT project.
The project offers an excellent research and training programme:
• Opportunity to join a network of researchers within Nokia Bell Labs and leading universities – Aalto University and Tampere University in the field of wireless communications.
• The ESR is primarily hosted by Nokia Bell Labs with stays in partner institutions (secondments).
• Training programme including regular summer and winter schools to build technical skills as well as soft skills.
• The salary is very competitive and composed by the following allowances: living, mobility and family (if applicable).
The ESR will be enrolled in the Doctoral programme at Tampere University of Technology, Finland.
Organization/Company: Nokia Bell N.V.
Location: Belgium, Antwerpen
Research field: Application-specific hardware, Digital signal processing, IC design
Research profile: First Stage Researcher (R1)
Type of contract: temporary - 3 years
Offer starting date: 1st August 2020
EU RESEARCH FRAMEWORK PROGRAMME: H2020 / Marie Skłodowska-Curie Actions
MARIE CURIE GRANT AGREEMENT NUMBER: 860921
Job title: Low power digital pre-distortion techniques
Access to internet is a basic human right that allows everyone to create, access, utilize, and share information and knowledge, which empowers individuals and communities to achieve their maximum capacity in promoting sustainable development and improving the quality of life. The significantly lower rate of the wired broadband access (copper, fiber, cable) network deployment in rural areas as opposed to urban areas due to the low return on investments for the operators is causing a very large broadband divide between urban and rural areas. To close the broadband divide and to provide ultra-fast broadband in rural areas, there is a need to devise new fixed access technologies that requires low investment from the telecom operator and no additional cost overhead from the end user. Since the current wired access technologies do not fulfill these requirements, a promising alternative is to devise extensions to the 5G/LTE technology to provide wireless broadband access. This can currently be done with a central 5G base station communicating wirelessly to a Customer Premise Equipment (CPE), such as Home outdoor modem, wall-mounted to the end-user home. The main advantage of such a fixed wireless access solution compared to wired access technologies is the relatively low investment as mobile operators can re-use the installation of 5G base stations or install an additional one to cover houses within a radius of a few kilometers instead of laying underground cables over the rural terrain.
The transceiver design for a regular mobile UE in 5G systems is challenging due to techniques like Massive MIMO and Beamforming that are integral part of the 5G standard. When this is combined with the ultra-wide bandwidth specification required to achieve the desired data rate as well as the constraints imposed by the power budget of the home outdoor modem, the design of transceiver circuits for the proposed system becomes extremely challenging. A higher power amplifier efficiency is necessary to realize an energy efficient system. The power amplifier is typically efficient in the non-linear region but operating in the non-linear region causes the distortion of the RF signal and generates emissions into the adjacent bands. Modern wireless systems apply digital predistortion to the RF signal before feeding to the power amplifier such that the output signal distortion in minimized. However, digital predistortion is a complex operation and requires processing power, and hence, a low power consuming processor architecture for digital pre-distortion is essential. The main objectives of the ESR to devise efficient algorithms to model the non-linearities in the power amplifier, improve its efficiency and devise a novel low power hardware architecture that can run digital pre-distortion algorithm efficiently.
Your major responsibility as an ESR is to carry out high-quality scientific research. This includes developing scientific concepts and communicating research results both verbally and in writing. As a research fellow, you will be registered as a Ph.D. candidate with the Doctoral School of Tampere University of Technology, under the supervision of Prof. Mikko Valkama, Head of the Department of Electrical Engineering.
The Ph.D. funding within SMArT will be for three years. There is some flexibility on the start date of each studentship, ranging from March to December 2020.
The researchers will receive a full salary in line with the rules for European Industrial Doctorates (see http://cordis.europa.eu/fp7/people/
) including contributions to the pension scheme and health care. A mobility allowance is also provided to support travel.
A suitable background is a Master of Science degree in Electrical Engineering, computer science, or related fields.
Knowledge of analog & mixed-signal design flow, CMOS technology flavors for high speed & low power design
Experience with simulation and synthesis tools, such as Synopsys DC, Cadence, Matlab
Experience with hardware description languages (e.g. VHDL, Verilog) and scripting languages (e.g. Python, TCL) is a plus.
Applicants must satisfy the eligibility rules stipulated by the Horizon 2020 Guidelines of the European Commission. In particular, they must not have performed their main activity in Belgium for more than 12 months of the 36 months preceding the position. Early-Stage Researchers must be in the first four years (full-time equivalent) of their research careers, starting at the date of obtaining the degree which would formally entitle them to embark on a doctorate. The application should also include a complete academic record (credits and grades), including information on the grade point average, the maximum possible grade in the grading system that is in use at your university as well as the minimum passing grade. If possible, provide also a ranking within your class. Please make sure to combine all the documents in a single PDF file.
Nokia is committed to equal employment opportunity including individuals with disabilities and does not discriminate against any employee or applicant for employment because of race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, and basis of disability or any other federal, state or local protected class. Female candidates are particularly encouraged to apply, given they are significantly underrepresented in the domain. European and national legal obligations will be adhered to, in particular, the European Charter for Researchers and the Code of Conduct for the Recruitment of Researchers.