OFFER DEADLINE01/09/2018 12:30 - Europe/Brussels
EU RESEARCH FRAMEWORK PROGRAMMEH2020 / Marie Skłodowska-Curie Actions
ORGANISATION/COMPANYInternational Reserach Projects Office
DEPARTMENTPromotion & Advisory Unit
Professor Antonio García Ríos, from the Department of Electronics and Computer Technology, DiTEC Research Group, at the University of Granada, welcomes postdoctoral candidates interested in applying for a Marie Skłodowska-Curie Individual Fellowships (MSCA-IF) in 2018 at this University. Please note that applicants must comply with the Mobility Rule (more information in the participant guide: http://sl.ugr.es/09Qg).
Brief description of the institution:
The University of Granada (UGR), founded in 1531, is one of the largest and most important universities in Spain. It serves more than 60000 students per year, including many foreign students, as UGR is the leader host institution in the Erasmus program. UGR, featuring 3650 professors and more than 2000 auxiliary personnel, offers a total of 75 degrees through its 112 departments and 28 centers.
UGR is also a leading institution in research, located in the top 5/10 of Spanish universities by a variety of ranking criteria, such as national R&D projects, fellowships awarded, publications, or international funding. UGR is one of the few Spanish Universities listed in the Shanghai Top 500 ranking (http://www.arwu.org/), and it is also well recognized for its web presence (http://www.4icu.org/top200/).
Internationally, we bet decidedly by our participation in the calls of H2020, both at partner and coordination. For the duration of the Seventh Framework Programme, the UGR has obtained a total of 66 projects, with total funding of 17.97 million euros, and for H2020, until 2015, more than 25 projects with total funding of more than 6 million euros. Our more than 3,000 researchers are grouped into 365 research groups covering all scientific fields and disciplines.
Brief description of the Centre/Research Group:
The Department of Electronics and Computer Technology at the University of Granada comprises several research groups that cover fields ranging from nanoelectronics and electronic device physics to digital and instrumentation systems. The Department is also a leading force in the Electronics Engineering and Communications programs at UGR. On the other hand, the DiTEC Research Group is actually formed by four Faculty members and several graduate students. Our main research interests are related to the application of reconfigurable devices to different fields, which include smart instruments for biosignal processing, high-performance digital signal processing, computer arithmetic, and cryptographic circuits. We have pioneered the merging of analog and digital reconfigurable technologies for the development of smart instruments, especially for the acquisition and processing of electric biosignals. Applications for cardiac monitoring, fetal heart rate monitoring, and wearable monitoring in military environments have been developed.
Our infrastructure includes a research lab at the Faculty of Sciences with the required equipment for prototyping and testing of analog and digital electronic systems, and we are members of the “Digital Sensors, Instrumentation and Systems Laboratory” at CITIC-UGR (http://citic.ugr.es/). We are also part of the multidisciplinary group ECsens (http://ecsens.ugr.es/). Thus, a number of research facilities (from typical electronic prototyping and testing to chemical analysis labs) are available to prospective candidates.
Prospective candidates will work on the development of new algorithms and circuits for decimal arithmetic. While decimal arithmetic should be the choice in human-oriented applications, it has had a limited use in the past due to the traditional drawbacks and increased area required for radix-10 digital implementations. However, a renewed interest on efficient decimal arithmetic implementations has emerged due to an increasing demand from many human-centric applications, such as automated financial trading and other business applications, or the advent of IoT and the proliferation CPSs (Cyber-Physical Systems). This all will require devices performing decimal arithmetic operations with the required precision, which usually require time and power consuming software routines on general purpose processors or may not be even achieved with application-specific binary arithmetic circuits. Thus, the proposed research will focus on the development of new algorithms and structures for the implementation of decimal arithmetic. Special attention will be devoted to BCD-digit multipliers and dividers, as well as the creation of building blocks for the Decimal Floating Point specification in IEEE 754 standard. The main target for all these blocks will be area optimization, but performance-optimized alternatives will be also developed. The resulting circuits will be tested through simulation and FPGA implementation, as well as semi-custom ASIC synthesis, and they will be included in a synthesizable HDL library.
Information Science and Engineering (ENG)
Letter of recommendation (optional)