ORGANISATION/COMPANYUniversity College Dublin
RESEARCH FIELDEngineering › Electrical engineering
RESEARCHER PROFILEFirst Stage Researcher (R1)
APPLICATION DEADLINE15/12/2021 23:00 - Europe/London
LOCATIONIreland › Dublin
TYPE OF CONTRACTTemporary
HOURS PER WEEK40
Post-Doctoral Fellowship in Hardware Design for Edge Machine Learning Processors for IoT Sensors at UCD, Dublin, Ireland
Applications are invited for a 24-months post-doctoral fellowship position at the School of Electrical & Electronics Engineering, University College Dublin, Ireland
This postdoc position is available at the Internet of Things Engineering lab at UCD Dublin in collaboration with MCCI (https://www.mcci.ie/). UCD researchers are currently developing low complexity deep neural network (DNN) techniques for deployment in IoT-enabled edge sensors for biomedical, industrial applications. Current efforts are focused on achieving optimization via model compression, quantization, etc. In this context, we are looking to hire multiple post-doctoral researchers who can conduct and supervise research on 1) development and optimization of DNN techniques for edge devices 2) Architectural design, circuit design, and implementation of efficient DNN accelerator hardware in terms of power, area, and performance. The candidate will also work in close collaboration with other hardware design researchers at UCD and MCCI tailoring DNN algorithms to support hardware limitations and opportunities. The selected candidates will have opportunities to co-supervise graduate students, participate in international conferences and collaborate with other academic and industrial researchers.
Applicants for this position should ideally have:
- A Ph.D. in Electrical Engineering or equivalent with a background in the design of digital circuits, microarchitectures, and/or mixed-signal circuits and with a good publication record.
- Expertise in Digital IC/FPGA design using Cadence/Synopsys tools with chip tape-out experience
- Background in signal processing, biomedical data processing, deep learning implementation using Verilog/ Matlab/Python
- Team player with strong analytical, interpersonal, communication and English language skills.
How to Apply
The project will be supervised by Dr. Deepu John, Dr. Barry Cardiff. Applications consisting of a cover letter, curriculum vitae, academic transcripts, List of publications, 3 references should be sent to email@example.com. Please send in your applications as soon as possible, latest by 30th August 2021. The positions will be closed immediately after a candidate is identified.
EURAXESS offer ID: 660961
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